89 lines
2.4 KiB
C
89 lines
2.4 KiB
C
#include "libultra_internal.h"
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#include "hardware.h"
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#include <macros.h>
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#define PIF_ADDR_START (void *) 0x1FC007FC
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typedef struct {
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u32 instr00;
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u32 instr01;
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u32 instr02;
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u32 instr03;
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} exceptionPreamble;
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#if defined(VERSION_EU) || defined(VERSION_SH)
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extern u32 EU_D_802f4330(u32, void (*));
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extern void D_802F4380();
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#endif
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u32 D_80365CD0; // maybe initialized?
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u64 osClockRate = 62500000;
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u32 D_80334808 = 0;
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#if defined(VERSION_EU) || defined(VERSION_SH)
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u32 EU_D_80336C40;
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u32 EU_D_80336C44;
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u32 D_8030208C = OS_IM_ALL;
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u32 EU_D_80302090 = 0;
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u8 EU_unusedZeroes[8] = { 0 };
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#endif
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#define EXCEPTION_TLB_MISS 0x80000000
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#define EXCEPTION_XTLB_MISS 0x80000080
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#define EXCEPTION_CACHE_ERROR 0x80000100
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#define EXCEPTION_GENERAL 0x80000180
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extern u32 osResetType;
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extern exceptionPreamble __osExceptionPreamble;
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void osInitialize(void) {
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u32 sp34;
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u32 sp30 = 0;
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#if defined(VERSION_EU) || defined(VERSION_SH)
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UNUSED u32 eu_sp34;
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UNUSED u32 eu_sp30;
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#endif
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UNUSED u32 sp2c;
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D_80365CD0 = TRUE;
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__osSetSR(__osGetSR() | 0x20000000);
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__osSetFpcCsr(0x01000800);
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while (__osSiRawReadIo(PIF_ADDR_START, &sp34)) {
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;
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}
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while (__osSiRawWriteIo(PIF_ADDR_START, sp34 | 8)) {
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;
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}
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*(exceptionPreamble *) EXCEPTION_TLB_MISS = __osExceptionPreamble;
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*(exceptionPreamble *) EXCEPTION_XTLB_MISS = __osExceptionPreamble;
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*(exceptionPreamble *) EXCEPTION_CACHE_ERROR = __osExceptionPreamble;
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*(exceptionPreamble *) EXCEPTION_GENERAL = __osExceptionPreamble;
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osWritebackDCache((void *) 0x80000000,
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EXCEPTION_GENERAL + sizeof(exceptionPreamble) - EXCEPTION_TLB_MISS);
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osInvalICache((void *) 0x80000000,
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EXCEPTION_GENERAL + sizeof(exceptionPreamble) - EXCEPTION_TLB_MISS);
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osMapTLBRdb();
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osPiRawReadIo(4, &sp30);
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sp30 &= ~0xf;
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if (sp30) {
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osClockRate = sp30;
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}
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osClockRate = osClockRate * 3 / 4;
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if (osResetType == RESET_TYPE_COLD_RESET) {
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bzero(osAppNmiBuffer, sizeof(osAppNmiBuffer));
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}
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#if defined(VERSION_EU) || defined(VERSION_SH)
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eu_sp30 = HW_REG(PI_STATUS_REG, u32);
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while (eu_sp30 & PI_STATUS_ERROR) {
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eu_sp30 = HW_REG(PI_STATUS_REG, u32);
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};
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if (!((eu_sp34 = HW_REG(ASIC_STATUS, u32)) & _64DD_PRESENT_MASK)) {
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EU_D_80302090 = 1;
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EU_D_802f4330(1, D_802F4380);
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} else {
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EU_D_80302090 = 0;
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}
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#endif
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}
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